Electronic interconnect devices are usually manufactured on a wafer level (frontend processes) and then the individualized elements are connected to a periphery via housing technology (backend processes). This way of proceedings provides an enlarged process chain including many different process steps which are usually carried out sequentially causing increased costs. Further, in case of thin chips or ultra thin chips (for example, chip thickness<60 μm) the chips are sensitive regarding handling and soldering since they may easily break or bend.
Accordingly, a method of manufacturing electronic devices, which avoids or at least abates the above mentioned inconveniences, is desirable.